Risc Vs Cisc Computing Architecture

Discuss the relative merits of CISC and RISC architectures when a chip manufacturer is planning a new processor.

All computers perform tasks through the CPU (Central Processing Unit) also known as the microprocessor, which carries out the fetch-execute cycle. This cycle is where the CPU fetches program instructions from the RAM (primary, volatile memory of the computer), interprets the program instructions and executes to then send back the computed results for the relevant components to carry out the instructions. The CPU s hardware is a complex circuit, with billions of microscopic transistors mounted on it, with a metal heat spreader on top for heat dissipation. CPUs have a different instruction sets that contains the data types, instructions registers and many more components needed for the microprocessor to decode and execute instructions. CISC (Complex Instruction Set Computing) and RISC (Reduced Instruction Set Computing) are two different types of instruction sets used for computer processors. CISC vs RISC is a large, controversial and historical debate as there is no definite answer to which one is better . In this essay, I will evaluate and compare the uses of CISC and RISC, and the relative merits that should be considered if a chip manufacturer is planning a new processor. The simplest way to examine the advantages and disadvantages of the RISC architecture is by contrasting it with its predecessor: CISC. To begin with, CISC and RISC perform in different ways, for different purposes. CISC emphasises on hardware whereas RISC emphasises on software the primary goal of the CISC architecture is to complete a task in as few lines as possible, whereas the RISC architecture only uses simple instructions that can be executed within one clock cycle. The CISC approach is achieved by building a processor with the hardware emphasised to be capable of understanding and executing a series of operations. A notable piece of information is that RISC came after CISC, with a reduced instruction set, smaller size and therefore lowering the cost of production. The idea to develop the RISC architecture was after using 80/20 rule early in the 1970 s. This rule means that 80 percent of your outcomes come from 20 percent of your inputs and this was applied to discover that computers programs written back in the 1970s showed over 80% of the instructions generated by them only used up to 20% of the functionality that was being provided, this lead to companies such as IBM to develop a new, refined architecture of CISC, that had a reduced instruction set, smaller size and efficient use. Although these facts make the CISC architecture seem irrelevant, inefficient and outdated, there are many advantages of CISC that can be understood through a brief look at real life examples of CISC and RISC, and it s various purposes. The most common example of CISC and RISC being used in two different scenarios and different purposes are desktop computers, and on the other hand smartphones. Desktop computers almost always have processors based on the CISC architecture. These processors are larger in size, and the production cost is significantly higher, however along with this is the complex instruction set, which allows for more advanced tasks at a faster speed. This allows desktop computers to be efficient when running run advanced, resource intensive programs such as 3DS Max and Maya and also graphically intensive Triple-A computer games (which many RISC architecture based processors are unable to do). However CISC is often inefficient when the desktop computer is usually used to perform basic tasks such as typing documents or playing music. It is also important to consider the power consumption by CISC architecture based processors, and the heat energy that is released which requires these processors to have a fan, which makes it suitable for desktop computers and not portable devices such as tablets or smartphones. RISC on the other hand is commonly used in portable devices such as tablet and smartphones. The physical advantage of having a reduced instruction set is the smaller size which makes it suitable for portable devices, as well as the non-necessity of having a fan. There is also the economic factor as there is a lower production cost for RISC since there are fewer transistors to be produced and therefore less cost. Since RISC has a reduced instruction set, it is efficient when performing common, less intensive tasks that most smartphones, tablets and even laptops require, however they are not so efficient when performing intensive tasks that CISC architecture based processors usually do. An example of the RISC architecture being inefficient and less advantageous than the CISC architecture, is Sony s PlayStation 3 gaming console, which was based on the RISC architecture, with the processor known as the PowerPC processor. Using this architecture and specific processor for the PS3 lead to problems such as not supporting Out of Order Execution, high development costs and high power consumption which made it much more inefficient for resource intensive games rather than just using a CISC based processor, which Sony later did for the PlayStation 4 gaming console. The reason for these issues outlined above can be understood by looking at an example of an instruction in low level assembly language (which CISC and RISC processors use) and the process that both architectures would go through to perform the task. A simple example is the opcode MULT that a single CISC chip would have, along with two variables as MULT x, y that will allow it to multiply the two values in a simply line, due to its complex circuitry, a RISC chip on the other hand would need four lines the first two to load the two values from the RAM into registers, the third line to multiply the two values using the PROD opcode, and the final line to then store the value back into the memory. This is because CISC uses less RAM, since there isn t a need to store intermediate results, however RISC uses more ram, as it needs to handle intermediate results. This shows how the CISC architecture is more efficient for performing complex tasks, however when it comes to basic tasks that RISC can perform in the same amount of lines, CISC has many more transistors and logic gates that are unused. Another reason for CISC to be able to do this is a technique it uses, known as pipelining. This technique is used by high performance processors which allows the processors to execute the next instruction as soon as it has fetched the first one, since it doesn t wait for the for the previous operation s result to be written back into the register files. The facts and their evaluation above discuss the relative merits of CISC and RISC architecture that should be considered when a company is planning on manufacturing a processor, this can be summarised to show that the production cost, target market and efficiency of the architectures should be the main points to be considered. The future of CISC and RISC may also be considered, such as the recent, EPIC (Explicitly Parallel Instruction Computing) architecture, which also has its own advantages and disadvantages in comparison to RISC and CISC. However the information above also concludes that they there is no better architecture in general. Since the question is from a company s standpoint for manufacturing architecture, and the company s goal would undoubtedly be to maximise profit, it is clear that when it comes to cost-efficiency, the advantages of RISC outweigh CISC, as well as the point that I believe to be most significant in this matter marketing. Over the recent years we have seen the domination of portable devices (that use the RISC architecture) such as smartphones, tablets and laptops over desktop computers (that use the CISC architecture), as the general consumer does not need a desktop computer since their handheld device does what needs to be done much more efficiently. For this particular reason, as well as the low production cost, I believe that a company manufacturing a new processor should consider investing in RISC based architecture over CISC based architecture within a processor.